1. Technical Field
The present invention relates to semiconductor devices, and more particularly to complementary metal oxide semiconductor devices having different silicide region materials depending on device dopant conductivity and employed in a single integration process.
2. Description of the Related Art
Silicides are often formed between contact metals and semiconductor materials, for example, for sources and drains of integrated circuit transistors. In many instances, complementary metal oxide semiconductor (CMOS) devices are employed in semiconductor devices and are processed side-by-side using the same materials and process parameters. Oftentimes, the process parameters and materials have different effects on performance between p-type field effect transistors (pFETs) versus n-type FETs (nFETs). For example, Ti silicide seems to improve nFET contact resistance due to its better thermal stability; however, Ti silicide degrades pFET contact resistance due to the contact interface resistivity as compared to other materials, like, NiSi.